Electronic Design II (EE124)
Mid-Term
Spring 2021

Date: 4/21/2021 (10:30am-11:45am)
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Q1 (25 points):
Ignore channel length modulation, assume nCox=200A/V2, pCox=100A/V2, VTH,NMOS = 0.5V, VTH,PMOS = -
0.5V. In case you forgot the MOSFET equation, here you are I=(nCox/2)(W/L)(VGS-VT)2. For the following
circuit,
1) How should we set V1 so that IM1 = 1mA? Note, M1 is PMOS.
2) If the IM1 = 1mA, find the currents in M2, M3, M4, and M5. Show steps.
3) Find Vout.






Q2 (25 points):
We want to find the gain of the following circuit. Assume for NMOS, the gm is gmn when (W/L)=1. For
PMOS, the gm is gmp when (W/L)=1. Ignore CLM.
a) Find the gain from Vin to VX. Express it in terms of gm1 and gm2.
b) Find the gain from VX to Vout. Express it in terms of gm3 and gm4.
c) Express gm1, gm2, gm3, and gm4 in terms of gmn and gmp.
d) Find the total gain in this circuit numerically (Hint, you already have all the parameters needed).




Q3 (25 points):
The following circuit is symmetric and it is a differential amplifier and the input signal is differential.
Include CLM.
a) Apply half circuit technique and draw the equivalent half circuit.
b) Find the Gm of the circuit.
c) Find the Rout of the circuit.
d) Find the gain of the circuit.





Q4 (25 points):
1) Draw the transistor parasitic capacitance in the following circuit.
2) Simplify the parasitic capacitance (i.e. eliminate and/or using Miller Theorem).
3) Find the poles of the circuit, assume no CLM.




















































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