ELECTRONICS ELEE08015 DIGITAL SYSTEM DESIGN 2
Practice 2: Digital System Design 2
Logic and Arithmetic
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The CD4011 Gate as an Inverter
In practice 1, we first introduced the LTspice which is a powerful simulation software. Then you used
this tool to investigate several properties of the chip CD4011. In this review experiment, please build
an inverter (i.e. invert an input logic) circuit using the CD4011 chip in LTspice.
Note that you should record the circuit you build and include the logic input and output in your digital
daybook to verify your design is correct.
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Other Logic Function
The previous sections have shown that the CD4011 gate gives the logic NOT-AND (NAND) function
and you have used it to realize a simple NOT logic function, which is one of the basic logic operations
of Boolean algebra (others are AND and OR). Actually, the NAND function gate can be used to create
all three basic logic operations of Boolean algebra. Although it may not always be the best way to
make very simple logic functions, using Boolean algebra to transform a given logic function into one
which is composed entirely of NAND operation can be a very effective way to design and build a logic
circuit.
Now construct a circuit in LTspice that can achieve the basic logic operations of Boolean algebra
AND, and construct another circuit to achieve OR. Here, you can build the corresponding output
logic using all possible different inputs. Then build a truth table for each circuit and infer what
logic function it realizes.




ELECTRONICS ELEE08015 DIGITAL SYSTEM DESIGN 2

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The CD4030 Logic Gate
In this section, you will explore a new member of CD4000 family, i.e. CD4030 logic gate. Different
from CD4011, this chip does the XOR operation for its two inputs. Although you can use the NAND
gate to construct the XOR gate, you cannot express the AND or OR with XOR because it is not a basic
element Boolean algebra. However, XOR frequently arises as an element of many important complex
functions such as logic which implements operations on arithmetic codewords. Commonly, rather than
using NAND composition and NOT-AND-OR decomposition, engineers designed transistor circuits
to realize the XOR function, which is generally more effective.
The circuit below is a 3-bit XOR function of S1, S2 and S3. Construct the circuit, exploring its
behavior and building up a truth table to explore when the output can be high.






Actually, the circuit above can be treated a small kernel of some large function. That means that the
small kernel can be extended in sequence to any size of input word. This is always used for applications
such as telecommunications error detection or cryptography and known as the “oddness” or “parity”
check function. According to this, please think that if there are n-bit inputs, what will be the
output. You should record why you get your conclusion in your digital daybook.


ELECTRONICS ELEE08015 DIGITAL SYSTEM DESIGN 2

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The Half-Adder Arithmetic Function
Just as the NAND function is a core operation in Boolean Logic, addition is a core operation in
arithmetic. Many complex arithmetic functions such as multiplication can be decomposed into many
steps of addition operation. In order to do arithmetic operations with logics functions we must first
choose a suitable code to represent numbers as logic codewords. In this section, the binary natural
number (BNN) code will be applied to represent numbers.
According to this, construct the 1-bit addition function circuit, which is also named as the “half-
adder” using the CD4011 and CD4030. There are two 1-bit inputs, In1 and In2, and two outputs,
carry and sum, in the circuit. Please also draw the truth table showing the relationship between
inputs and outputs.
Then explain what the sum and carry stand for and show that this circuit indeed does take two
1-bit number inputs and give their 2-bit sum.








ELECTRONICS ELEE08015 DIGITAL SYSTEM DESIGN 2

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Adding Large Numbers
The modular design is to decompose a large or complex design into several small and simple modules.
Concretely, if a large circuit can be decomposed into repeated copies of smaller circuit, then we can
improve the design efficiency significantly and more attention can be paid to optimize the small
module.
We have seen this approach in the previews sections when building the XOR logic using NAND and
extend the XOR to realize the parity check function.
Similarly, the half-adder you have constructed can also be treated a small kernel (module) of a large
and complex function, for example, adding to large numbers (i.e. n-bit number).
According to the discussion above, you are required to build a circuit in LTspice to add up 2-bit number.
In the circuit, you will finally have 4 inputs (a0, b0, a1, b1), and 3 outputs (s0, s1, carry). You should
first build up your circuit and then verify your circuit outputs by putting different inputs. Then
according to your result, build a truth table to illustrate your circuit performance.
Then think the following questions: how many half-adder kernels are required when adding up
a n-bit number with another n-bit number (n t 2)? Illustrate your answer.