7C
6C
5C
4C
3C
2C
1C
COM
7
6
5
4
3
2
1
7B
6B
5B
4B
3B
2B
1B
10
11
12
13
14
15
16
9
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Folder
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027P –DECEMBER 1976–REVISED AUGUST 2019
ULN200x, ULQ200x High-Voltage, High-Current Darlington Transistor Arrays
1
1 Features
1• 500-mA-Rated Collector Current (Single Output)
• High-Voltage Outputs: 50 V
• Output Clamp Diodes
• Inputs Compatible With Various Types of Logic
• Relay-Driver Applications
2 Applications
• Relay Drivers
• Stepper and DC Brushed Motor Drivers
• Lamp Drivers
• Display Drivers (LED and Gas Discharge)
• Line Drivers
• Logic Buffers
3 Description
The ULx200xA devices are high-voltage, high-current
Darlington transistor arrays. Each consists of seven
NPN Darlington pairs that feature high-voltage
outputs with common-cathode clamp diodes for
switching inductive loads.
The collector-current rating of a single Darlington pair
is 500 mA. The Darlington pairs can be paralleled for
higher current capability. Applications include relay
drivers, hammer drivers, lamp drivers, display drivers
(LED and gas discharge), line drivers, and logic
buffers. For 100-V (otherwise interchangeable)
versions of the ULx2003A devices, see the SLRS023
data sheet for the SN75468 and SN75469 devices.
The ULN2002A device is designed specifically for use
with 14-V to 25-V PMOS devices. Each input of this
device has a Zener diode and resistor in series to
control the input current to a safe limit. The
ULx2003A devices have a 2.7-kΩ series base resistor
for each Darlington pair for operation directly with
TTL or 5-V CMOS devices.
The ULx2004A devices have a 10.5-kΩ series base
resistor to allow operation directly from CMOS
devices that use supply voltages of 6 V to 15 V. The
required input current of the ULx2004A device is
below that of the ULx2003A devices, and the required
voltage is less than that required by the ULN2002A
device.
.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
ULx200xD SOIC (16) 9.90 mm × 3.91 mm
ULx200xN PDIP (16) 19.30 mm × 6.35 mm
ULN200xNS SOP (16) 10.30 mm × 5.30 mm
ULN200xPW TSSOP (16) 5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
.
.
Simplified Block Diagram
2ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
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Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
Submit Documentation Feedback Copyright © 1976–2019, Texas Instruments Incorporated
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 4
6.5 Electrical Characteristics: ULN2002A ....................... 5
6.6 Electrical Characteristics: ULN2003A and
ULN2004A.................................................................. 5
6.7 Electrical Characteristics: ULN2003AI ...................... 6
6.8 Electrical Characteristics: ULN2003AI ..................... 6
6.9 Electrical Characteristics: ULQ2003A and
ULQ2004A ................................................................. 7
6.10 Switching Characteristics: ULN2002A, ULN2003A,
ULN2004A.................................................................. 7
6.11 Switching Characteristics: ULN2003AI .................. 7
6.12 Switching Characteristics: ULN2003AI .................. 8
6.13 Switching Characteristics: ULQ2003A, ULQ2004A 8
6.14 Typical Characteristics ............................................ 8
7 Parameter Measurement Information ................ 10
8 Detailed Description ............................................ 12
8.1 Overview ................................................................. 12
8.2 Functional Block Diagrams ..................................... 12
8.3 Feature Description................................................. 13
8.4 Device Functional Modes........................................ 13
9 Application and Implementation ........................ 14
9.1 Application Information............................................ 14
9.2 Typical Application ................................................. 14
9.3 System Examples ................................................... 17
10 Power Supply Recommendations ..................... 18
11 Layout................................................................... 18
11.1 Layout Guidelines ................................................. 18
11.2 Layout Example .................................................... 18
12 Device and Documentation Support ................. 19
12.1 Documentation Support ........................................ 19
12.2 Related Links ........................................................ 19
12.3 Community Resources.......................................... 19
12.4 Trademarks ........................................................... 19
12.5 Electrostatic Discharge Caution............................ 19
12.6 Glossary ................................................................ 19
13 Mechanical, Packaging, and Orderable
Information ........................................................... 19
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision O (January 2016) to Revision P Page
• Changed ULN200xA Minimum Temperature Rating from –20 C to –40 C in the Absolute Maximum Ratings table ............ 4
Changes from Revision N (June 2015) to Revision O Page
• Changed Pin Functions table to correct typographical error ................................................................................................. 3
Changes from Revision M (February 2013) to Revision N Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
• Deleted Ordering Information table. No specification changes. ............................................................................................. 1
• Moved Typical Characteristics into Specifications section. ................................................................................................... 8
Changes from Revision L (April 2012) to Revision M Page
• Updated temperature rating for ULN2003AI in the ORDERING INFORMATION table ........................................................ 1
Changes from Revision K (August 2011) to Revision L Page
• Removed reference to obsolete ULN2001 device.................................................................................................................. 1
1B 1 16
2B 2 15
3B 3 14
4B 4 13
5B 5 12
6B 6 11
7B 7 10
E 8 9
1C
2C
3C
4C
5C
6C
7C
COM
3
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027P –DECEMBER 1976–REVISED AUGUST 2019
Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
Submit Documentation FeedbackCopyright © 1976–2019, Texas Instruments Incorporated
(1) I = Input, O = Output
5 Pin Configuration and Functions
D, N, NS, and PW Package
16-Pin SOIC, PDIP, SO, and TSSOP
Top View
Pin Functions
PIN
I/O (1) DESCRIPTION
NAME NO.
1B 1
I Channel 1 through 7 Darlington base input
2B 2
3B 3
4B 4
5B 5
6B 6
7B 7
1C 16
O Channel 1 through 7 Darlington collector output
2C 15
3C 14
4C 13
5C 12
6C 11
7C 10
COM 9 — Common cathode node for flyback diodes (required for inductive loads)
E 8 — Common emitter shared by all channels (typically tied to ground)
4ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
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Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
Submit Documentation Feedback Copyright © 1976–2019, Texas Instruments Incorporated
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the emitter/substrate terminal E, unless otherwise noted.
6 Specifications
6.1 Absolute Maximum Ratings
at 25°C free-air temperature (unless otherwise noted) (1)
MIN MAX UNIT
VCC Collector-emitter voltage 50 V
Clamp diode reverse voltage (2) 50 V
VI Input voltage (2) 30 V
Peak collector current, See Figure 4 and Figure 5 500 mA
IOK Output clamp current 500 mA
Total emitter-terminal current –2.5 A
TA Operating free-air temperature range
ULN200xA –40 70
°C
ULN200xAI –40 105
ULQ200xA –40 85
ULQ200xAT –40 105
TJ Operating virtual junction temperature 150 °C
Lead temperature for 1.6 mm (1/16 inch) from case for 10 seconds 260 °C
Tstg Storage temperature –65 150 °C
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE UNIT
V(ESD)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000
V
Charged device model (CDM), per JEDEC specification JESD22-C101 (2) ±500
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Collector-emitter voltage (non-V devices) 0 50 V
TJ Junction temperature –40 125 °C
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.4 Thermal Information
THERMAL METRIC (1)
ULx200x
UNITD(SOIC)
N
(PDIP)
NS
(SO)
PW
(TSSOP)
16 PINS 16 PINS 16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 73 67 64 108 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 36 54 n/a 33.6 °C/W
RθJB Junction-to-board thermal resistance n/a n/a n/a 51.9 °C/W
ψJT Junction-to-top characterization parameter n/a n/a n/a 2.1 °C/W
ψJB Junction-to-board characterization parameter n/a n/a n/a 51.4 °C/W
5ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
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Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
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6.5 Electrical Characteristics: ULN2002A
TA = 25°C
PARAMETER TEST FIGURE TEST CONDITIONS
ULN2002A
UNIT
MIN TYP MAX
VI(on) ON-state input voltage Figure 14 VCE = 2 V, IC = 300 mA 13 V
VOH
High-level output voltage after
switching Figure 18 VS = 50 V, IO = 300 mA VS – 20 mV
VCE(sat)
Collector-emitter saturation
voltage Figure 12
II = 250 μA, IC = 100 mA 0.9 1.1
VII = 350 μA, IC = 200 mA 1 1.3
II = 500 μA, IC = 350 mA 1.2 1.6
VF Clamp forward voltage Figure 15 IF = 350 mA 1.7 2 V
ICEX Collector cutoff current
Figure 9 VCE = 50 V, II = 0 50
μA
Figure 10 VCE = 50 V,TA = 70°C
II = 0 100
VI = 6 V 500
II(off) OFF-state input current Figure 10 VCE = 50 V, IC = 500 μA 50 65 μA
II Input current Figure 11 VI = 17 V 0.82 1.25 mA
IR Clamp reverse current Figure 14
VR = 50 V TA = 70°C 100 μA
VR = 50 V 50
Ci Input capacitance VI = 0, f = 1 MHz 25 pF
6.6 Electrical Characteristics: ULN2003A and ULN2004A
TA = 25°C
PARAMETER TESTFIGURE TEST CONDITIONS
ULN2003A ULN2004A
UNIT
MIN TYP MAX MIN TYP MAX
VI(on)
ON-state input
voltage Figure 14 VCE = 2 V
IC = 125 mA 5
V
IC = 200 mA 2.4 6
IC = 250 mA 2.7
IC = 275 mA 7
IC = 300 mA 3
IC = 350 mA 8
VOH
High-level output
voltage after
switching
Figure 18 VS = 50 V, IO = 300 mA VS – 20 VS – 20 mV
VCE(sat)
Collector-emitter
saturation voltage Figure 13
II = 250 μA, IC = 100 mA 0.9 1.1 0.9 1.1
VII = 350 μA, IC = 200 mA 1 1.3 1 1.3
II = 500 μA, IC = 350 mA 1.2 1.6 1.2 1.6
ICEX
Collector cutoff
current
Figure 9 VCE = 50 V, II = 0 50 50
μA
Figure 10 VCE = 50 V,TA = 70°C
II = 0 100 100
VI = 6 V 500
VF
Clamp forward
voltage Figure 16
IF = 350 mA 1.7 2 1.7 2 V
II(off)
Off-state input
current Figure 11
VCE = 50 V,
TA = 70°C,
IC = 500 μA 50 65 50 65 μA
II Input current Figure 12
VI = 3.85 V 0.93 1.35
mAVI = 5 V 0.35 0.5
VI = 12 V 1 1.45
IR
Clamp reverse
current Figure 15
VR = 50 V 50 50 μA
VR = 50 V TA = 70°C 100 100
Ci Input capacitance VI = 0, f = 1 MHz 15 25 15 25 pF
6ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027P –DECEMBER 1976–REVISED AUGUST 2019 www.ti.com
Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
Submit Documentation Feedback Copyright © 1976–2019, Texas Instruments Incorporated
6.7 Electrical Characteristics: ULN2003AI
TA = 25°C
PARAMETER TEST FIGURE TESTCONDITIONS
ULN2003AI
UNIT
MIN TYP MAX
VI(on) ON-state input voltage Figure 14 VCE = 2 V
IC = 200 mA 2.4
VIC = 250 mA 2.7
IC = 300 mA 3
VOH
High-level output voltage after
switching Figure 18 VS = 50 V, IO = 300 mA VS – 50 mV
VCE(sat) Collector-emitter saturation voltage Figure 13
II = 250 μA, IC = 100 mA 0.9 1.1
VII = 350 μA, IC = 200 mA 1 1.3
II = 500 μA, IC = 350 mA 1.2 1.6
ICEX Collector cutoff current Figure 9 VCE = 50 V, II = 0 50 μA
VF Clamp forward voltage Figure 16 IF = 350 mA 1.7 2 V
II(off) OFF-state input current Figure 11 VCE = 50 V, IC = 500 μA 50 65 μA
II Input current Figure 12 VI = 3.85 V 0.93 1.35 mA
IR Clamp reverse current Figure 15 VR = 50 V 50 μA
Ci Input capacitance VI = 0, f = 1 MHz 15 25 pF
6.8 Electrical Characteristics: ULN2003AI
TA = –40°C to 105°C
PARAMETER TEST FIGURE TEST CONDITIONS
ULN2003AI
UNIT
MIN TYP MAX
VI(on) ON-state input voltage Figure 14 VCE = 2 V
IC = 200 mA 2.7
VIC = 250 mA 2.9
IC = 300 mA 3
VOH
High-level output voltage after
switching Figure 18 VS = 50 V, IO = 300 mA VS – 50 mV
VCE(sat) Collector-emitter saturation voltage Figure 13
II = 250 μA, IC = 100 mA 0.9 1.2
VII = 350 μA, IC = 200 mA 1 1.4
II = 500 μA, IC = 350 mA 1.2 1.7
ICEX Collector cutoff current Figure 9 VCE = 50 V, II = 0 100 μA
VF Clamp forward voltage Figure 16 IF = 350 mA 1.7 2.2 V
II(off) OFF-state input current Figure 11 VCE = 50 V, IC = 500 μA 30 65 μA
II Input current Figure 12 VI = 3.85 V 0.93 1.35 mA
IR Clamp reverse current Figure 15 VR = 50 V 100 μA
Ci Input capacitance VI = 0, f = 1 MHz 15 25 pF
7ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
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Submit Documentation FeedbackCopyright © 1976–2019, Texas Instruments Incorporated
6.9 Electrical Characteristics: ULQ2003A and ULQ2004A
over recommended operating conditions (unless otherwise noted)
PARAMETER TESTFIGURE TEST CONDITIONS
ULQ2003A ULQ2004A
UNIT
MIN TYP MAX MIN TYP MAX
VI(on)
ON-state input
voltage Figure 14 VCE = 2 V
IC = 125 mA 5
V
IC = 200 mA 2.7 6
IC = 250 mA 2.9
IC = 275 mA 7
IC = 300 mA 3
IC = 350 mA 8
VOH
High-level output
voltage after
switching
Figure 18 VS = 50 V, IO = 300 mA VS – 50 VS – 50 mV
VCE(sat)
Collector-emitter
saturation voltage Figure 13
II = 250 μA, IC = 100 mA 0.9 1.2 0.9 1.1
VII = 350 μA, IC = 200 mA 1 1.4 1 1.3
II = 500 μA, IC = 350 mA 1.2 1.7 1.2 1.6
ICEX
Collector cutoff
current
Figure 9 VCE = 50 V, II = 0 100 50
μA
Figure 10
VCE = 50 V,
TA = 70°C
II = 0 100
VI = 6 V 500
VF
Clamp forward
voltage Figure 16 IF = 350 mA 1.7 2.3 1.7 2 V
II(off)
OFF-state input
current Figure 11
VCE = 50 V,
TA = 70°C,
IC = 500 μA 65 50 65 μA
II Input current Figure 12
VI = 3.85 V 0.93 1.35
mAVI = 5 V 0.35 0.5
VI = 12 V 1 1.45
IR
Clamp reverse
current Figure 15
VR = 50 V TA = 25°C 100 50 μA
VR = 50 V 100 100
Ci Input capacitance VI = 0, f = 1 MHz 15 25 15 25 pF
6.10 Switching Characteristics: ULN2002A, ULN2003A, ULN2004A
TA = 25°C
PARAMETER TEST CONDITIONS
ULN2002A, ULN2003A,
ULN2004A UNIT
MIN TYP MAX
tPLH Propagation delay time, low- to high-level output See Figure 17 0.25 1 μs
tPHL Propagation delay time, high- to low-level output See Figure 17 0.25 1 μs
6.11 Switching Characteristics: ULN2003AI
TA = 25°C
PARAMETER TEST CONDITIONS
ULN2003AI
UNIT
MIN TYP MAX
tPLH Propagation delay time, low- to high-level output See Figure 17 0.25 1 μs
tPHL Propagation delay time, high- to low-level output See Figure 17 0.25 1 μs
21.5
1
0.5
700600500400300200100
0
800
2.5
IC(tot) - Total Collector Current - mA
0V
CE
(sa
t)-
Co
lle
ct
or
-
Em
itt
er
Sa
tu
ra
tio
n
Vo
lta
ge
-
V
V C
E(
sa
t)
II = 250 µA
II = 350 µA
II = 500 µA
TA = 25°C
0
IC - Collector Current - mA
2.5
800
0
100 200 300 400 500 600 700
0.5
1
1.5
2
II = 350 µA
II = 500 µA
VC
E(
sa
t)-
Co
lle
ct
o
r-
Em
itt
er
Sa
tu
ra
tio
n
Vo
lta
ge
-
V
V C
E(
sa
t)
TA = 25°C
II = 250 µA
8
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
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Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
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6.12 Switching Characteristics: ULN2003AI
TA = –40°C to 105°C
PARAMETER TEST CONDITIONS
ULN2003AI
UNIT
MIN TYP MAX
tPLH Propagation delay time, low- to high-level output See Figure 17 1 10 μs
tPHL Propagation delay time, high- to low-level output See Figure 17 1 10 μs
6.13 Switching Characteristics: ULQ2003A, ULQ2004A
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS
ULQ2003A, ULQ2004A
UNIT
MIN TYP MAX
tPLH Propagation delay time, low- to high-level output See Figure 17 1 10 μs
tPHL Propagation delay time, high- to low-level output See Figure 17 1 10 μs
6.14 Typical Characteristics
Figure 1. Collector-Emitter Saturation Voltage
vs Collector Current (One Darlington)
Figure 2. Collector-Emitter Saturation Voltage
vs Total Collector Current (Two Darlingtons in Parallel)
0.9
1.1
1.3
1.5
1.7
1.9
2.1
100 200 300 400 500
Output Current – mA
M
ax
im
u
m
V C
E(
sa
t)
Vo
lta
ge
–
V
TJ = -40°C to 105°C
Maximum
Typical
100
150
200
250
300
350
400
450
500
250 350 450 550 650
Input Current – µA
O
u
tp
u
t
C
u
rr
e
n
t
–
m
A
VCE = 2 V
TJ = -40°C to 105°C
Minimum
Conducting Simultaneously
N = Number of Outputs
500
400
300
200
100
908070605040302010
0
100
600
Duty Cycle - %
0
N = 7
TA = 85°C
N = 5
N = 3
N = 2
N = 6
N = 1
IC
-
M
ax
im
u
m
Co
lle
ct
or
Cu
rr
en
t -
m
A
CI
N = 4
0
200
400
600
800
1000
1200
1400
1600
1800
2000
2 2.5 3 3.5 4 4.5 5
Input Voltage – V
In
pu
t C
ur
re
nt
–
µ
A
TJ = -40°C to 105°C
Maximum
Typical
0
Duty Cycle - %
600
100
0
10 20 30 40 50 60 70 80 90
100
200
300
400
500
TA = 70°C
N = Number of Outputs
Conducting Simultaneously
N = 6
N = 7
N = 5
N = 3
N = 2
N = 1
IC
-
M
ax
im
u
m
Co
lle
ct
or
Cu
rr
en
t -
m
A
CI
N = 4
0
II - Input Current - µA
500
200
0
25 50 75 100 125 150 175
50
100
150
200
250
300
350
400
450
VS = 10 V
VS = 8 V
IC
-
Co
lle
ct
or
Cu
rr
en
t -
m
A
CI
RL = 10 Ω
TA = 25°C
9
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
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Typical Characteristics (continued)
Figure 3. Collector Current vs Input Current Figure 4. D Package Maximum Collector Current
vs Duty Cycle
Figure 5. N Package Maximum Collector Current
vs Duty Cycle
Figure 6. Maximum and Typical Input Current
vs Input Voltage
Figure 7. Maximum and Typical Saturated VCE
vs Output Current
Figure 8. Minimum Output Current vs Input Current
VR
Open
IR IFVF
Open
Open
VCE ICII
hFE =
IC
II
Open
VCE ICVI(on)
Open VCE
ICII(off)
Open
Open
II(on)
VI
Open VCE
Open
ICEX
Open VCE
VI
ICEX
10
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027P –DECEMBER 1976–REVISED AUGUST 2019 www.ti.com
Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
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7 Parameter Measurement Information
Figure 9. ICEX Test Circuit Figure 10. ICEX Test Circuit
Figure 11. II(off) Test Circuit Figure 12. II Test Circuit
II is fixed for measuring VCE(sat), variable for measuring hFE.
Figure 13. hFE, VCE(sat) Test Circuit Figure 14. VI(on) Test Circuit
Figure 15. IR Test Circuit Figure 16. VF Test Circuit
90% 90%
1.5 V 1.5 V
10% 10%
40 µs
≤10 ns≤5 ns
VIH
(see Note C)
0 V
VOH
VOL
Input
Output
VOLTAGE WAVEFORMS
200 W
11
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
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Parameter Measurement Information (continued)
Figure 17. Propagation Delay-Time Waveforms
For testing the ULN2003A device, ULN2003AI device, and
ULQ2003A devices, VIH = 3 V; for the ULN2002A device, VIH = 13
V; for the ULN2004A and the ULQ2004A devices, VIH = 8 V.
Figure 18. Latch-Up Test Circuit and Voltage Waveforms
COM
Output C
E
Input B
RB
2.7 NŸ
7.2 NŸ 3 NŸ
COM
Output C
E
Input B
RB
10.5 NŸ
7.2 NŸ 3 NŸ
COM
Output C
E
Input B
10.5 NŸ
7.2 NŸ 3 NŸ
7 V
12
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027P –DECEMBER 1976–REVISED AUGUST 2019 www.ti.com
Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
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8 Detailed Description
8.1 Overview
This standard device has proven ubiquity and versatility across a wide range of applications. This is due to
integration of 7 Darlington transistors of the device that are capable of sinking up to 500 mA and wide GPIO
range capability.
The ULN2003A device comprises seven high-voltage, high-current NPN Darlington transistor pairs. All units
feature a common emitter and open collector outputs. To maximize their effectiveness, these units contain
suppression diodes for inductive loads. The ULN2003A device has a series base resistor to each Darlington pair,
thus allowing operation directly with TTL or CMOS operating at supply voltages of 5 V or 3.3 V. The ULN2003A
device offers solutions to a great many interface needs, including solenoids, relays, lamps, small motors, and
LEDs. Applications requiring sink currents beyond the capability of a single output may be accommodated by
paralleling the outputs.
This device can operate over a wide temperature range (–40°C to 105°C).
8.2 Functional Block Diagrams
All resistor values shown are nominal. The collector-emitter diode is a parasitic structure and should not be used
to conduct current. If the collectors go below GND, an external Schottky diode should be added to clamp
negative undershoots.
Figure 19. ULN2002A Block Diagram
Figure 20. ULN2003A, ULQ2003A and ULN2003AI
Block Diagram
Figure 21. ULN2004A and LQ2004A Block Diagram
13
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027P –DECEMBER 1976–REVISED AUGUST 2019
Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
Submit Documentation FeedbackCopyright © 1976–2019, Texas Instruments Incorporated
8.3 Feature Description
Each channel of the ULN2003A device consists of Darlington connected NPN transistors. This connection
creates the effect of a single transistor with a very high-current gain (β2). This can be as high as 10,000 A/A at
certain currents. The very high β allows for high-output current drive with a very low input current, essentially
equating to operation with low GPIO voltages.
The GPIO voltage is converted to base current through the 2.7-kΩ resistor connected between the input and
base of the predriver Darlington NPN. The 7.2-kΩ and 3-kΩ resistors connected between the base and emitter of
each respective NPN act as pulldowns and suppress the amount of leakage that may occur from the input.
The diodes connected between the output and COM pin is used to suppress the kick-back voltage from an
inductive load that is excited when the NPN drivers are turned off (stop sinking) and the stored energy in the
coils causes a reverse current to flow into the coil supply through the kick-back diode.
In normal operation the diodes on base and collector pins to emitter will be reversed biased. If these diodes are
forward biased, internal parasitic NPN transistors will draw (a nearly equal) current from other (nearby) device
pins.
8.4 Device Functional Modes
8.4.1 Inductive Load Drive
When the COM pin is tied to the coil supply voltage, ULN2003A device is able to drive inductive loads and
suppress the kick-back voltage through the internal free-wheeling diodes.
8.4.2 Resistive Load Drive
When driving a resistive load, a pullup resistor is needed in order for ULN2003A device to sink current and for
there to be a logic high level. The COM pin can be left floating for these applications.
IN1
IN2
ULN2003A
IN3
IN4
OUT1
OUT2
OUT3
OUT4
IN5
IN6
IN7
GND
OUT5
OUT6
OUT7
COM
3.3-V Logic
3.3-V Logic
3.3-V Logic
VSUP
VSUP
14
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027P –DECEMBER 1976–REVISED AUGUST 2019 www.ti.com
Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
Submit Documentation Feedback Copyright © 1976–2019, Texas Instruments Incorporated
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
Typically, the ULN2003A device drives a high-voltage or high-current (or both) peripheral from an MCU or logic
device that cannot tolerate these conditions. This design is a common application of ULN2003A device, driving
inductive loads. This includes motors, solenoids and relays. Figure 22 shows a model for each load type.
9.2 Typical Application
Figure 22. ULN2003A Device as Inductive Load Driver
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters
DESIGN PARAMETER EXAMPLE VALUE
GPIO voltage 3.3 V or 5 V
Coil supply voltage 12 V to 48 V
Number of channels 7
Output current (RCOIL) 20 mA to 300 mA per channel
Duty cycle 100%

AJ MAX
MAX
JA
T T
PD


T
N
D OLi Li
i 1
P V I
=
= ´å
15
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027P –DECEMBER 1976–REVISED AUGUST 2019
Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
Submit Documentation FeedbackCopyright © 1976–2019, Texas Instruments Incorporated
9.2.2 Detailed Design Procedure
When using ULN2003A device in a coil driving application, determine the following:
• Input voltage range
• Temperature range
• Output and drive current
• Power dissipation
9.2.2.1 Drive Current
The coil voltage (VSUP), coil resistance (RCOIL), and low-level output voltage (VCE(SAT) or VOL) determine the coil
current.
ICOIL = (VSUP – VCE(SAT)) / RCOIL (1)
9.2.2.2 Low-Level Output Voltage
The low-level output voltage (VOL) is the same as VCE(SAT) and can be determined by, Figure 1, Figure 2, or
Figure 7.
9.2.2.3 Power Dissipation and Temperature
The number of coils driven is dependent on the coil current and on-chip power dissipation. The number of coils
driven can be determined by Figure 4 or Figure 5.
For a more accurate determination of number of coils possible, use the below equation to calculate ULN2003A
device on-chip power dissipation PD:
where
• N is the number of channels active together
• VOLi is the OUTi pin voltage for the load current ILi. This is the same as VCE(SAT) (2)
To ensure reliability of ULN2003A device and the system, the on-chip power dissipation must be lower that or
equal to the maximum allowable power dissipation (PD(MAX)) dictated by below equation Equation 3.
where
• TJ(max) is the target maximum junction temperature
• TA is the operating ambient temperature
• RθJA is the package junction to ambient thermal resistance (3)
Limit the die junction temperature of the ULN2003A device to less than 125°C. The IC junction temperature is
directly proportional to the on-chip power dissipation.
Time (s)
O
ut
pu
t v
ol
ta
ge
-

V
-0.004 0 0.004 0.008 0.012 0.016
0
1
2
3
4
5
6
7
8
9
10
11
12
13
D001 Time (s)
O
ut
pu
t v
ol
ta
ge
-

V
-0.004 0 0.004 0.008 0.012 0.016
0
2
4
6
8
10
12
14
D001
16
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027P –DECEMBER 1976–REVISED AUGUST 2019 www.ti.com
Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
Submit Documentation Feedback Copyright © 1976–2019, Texas Instruments Incorporated
9.2.3 Application Curves
The characterization data shown in Figure 23 and Figure 24 were generated using the ULN2003A device driving
an OMRON G5NB relay and under the following conditions: VIN = 5 V, VSUP= 12 V, and RCOIL= 2.8 kΩ.
Figure 23. Output Response With Activation of Coil
(Turnon)
Figure 24. Output Response With De-activation of Coil
(Turnoff)
VCC V
RP
ULQ2003A
1
2
3
4
5
6
9
10
11
12
13
14
15
16
8
TTL
Output
7
VDD V
ULN2004A
ULQ2004A
1
2
3
4
5
6
9
10
11
12
13
14
15
16
8
CMOS
Output
7
1
2
3
4
5
6
7
9
10
11
12
13
14
15
16
8
ULN2002A
P-MOS
Output
VSS V ULQ2003A
Lam
TestTTL
Output
VCC V
1
2
3
4
5
6
9
10
11
12
13
14
15
16
8
7
17
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027P –DECEMBER 1976–REVISED AUGUST 2019
Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
Submit Documentation FeedbackCopyright © 1976–2019, Texas Instruments Incorporated
9.3 System Examples
Figure 25. P-MOS to Load Figure 26. TTL to Load
Figure 27. Buffer for Higher Current Loads Figure 28. Use of Pullup Resistors to Increase
Drive Current
1


2


3


4
8

VCOM

7


6


5



16





E






9

15
14
13
12
11
10
1B
2B
3B
4B
7B
6B
5B
1C
2C
3C
4C
7C
6C
5C
GND
18
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
SLRS027P –DECEMBER 1976–REVISED AUGUST 2019 www.ti.com
Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
Submit Documentation Feedback Copyright © 1976–2019, Texas Instruments Incorporated
10 Power Supply Recommendations
This device does not need a power supply. However, the COM pin is typically tied to the system power supply.
When this is the case, it is very important to ensure that the output voltage does not heavily exceed the COM pin
voltage. This discrepancy heavily forward biases the fly-back diodes and causes a large current to flow into
COM, potentially damaging the on-chip metal or over-heating the device.
11 Layout
11.1 Layout Guidelines
Thin traces can be used on the input due to the low-current logic that is typically used to drive ULN2003A device.
Take care to separate the input channels as much as possible, as to eliminate crosstalk. TI recommends thick
traces for the output to drive whatever high currents that may be needed. Wire thickness can be determined by
the current density of the trace material and desired drive current.
Because all of the channels currents return to a common emitter, it is best to size that trace width to be very
wide. Some applications require up to 2.5 A.
11.2 Layout Example
Figure 29. Package Layout
19
ULN2002A, ULN2003A, ULN2003AI
ULQ2003A, ULN2004A, ULQ2004A
www.ti.com SLRS027P –DECEMBER 1976–REVISED AUGUST 2019
Product Folder Links: ULN2002A ULN2003A ULN2003AI ULQ2003A ULN2004A ULQ2004A
Submit Documentation FeedbackCopyright © 1976–2019, Texas Instruments Incorporated
12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
SN7546x Darlington Transistor Arrays, SLRS023
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICALDOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
ULN2002A Click here Click here Click here Click here Click here
ULN2003A Click here Click here Click here Click here Click here
ULN2003AI Click here Click here Click here Click here Click here
ULN2004A Click here Click here Click here Click here Click here
ULQ2003A Click here Click here Click here Click here Click here
ULQ2004A Click here Click here Click here Click here Click here
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
PACKAGE OPTION ADDENDUM
www.ti.com 14-Aug-2021
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
ULN2002AN ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -20 to 70 ULN2002AN
ULN2002ANE4 ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -20 to 70 ULN2002AN
ULN2003AD ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ADE4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ADR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ADRE4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ADRG3 ACTIVE SOIC D 16 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ADRG4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003AID ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 ULN2003AI
ULN2003AIDE4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 ULN2003AI
ULN2003AIDG4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 ULN2003AI
ULN2003AIDR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 105 ULN2003AI
ULN2003AIDRE4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 ULN2003AI
ULN2003AIDRG4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 ULN2003AI
ULN2003AIN ACTIVE PDIP N 16 25 RoHS & Green NIPDAU | SN N / A for Pkg Type -40 to 105 ULN2003AIN
ULN2003AINE4 ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 105 ULN2003AIN
ULN2003AINSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 ULN2003AI
ULN2003AIPW ACTIVE TSSOP PW 16 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 UN2003AI
ULN2003AIPWR ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 105 UN2003AI
ULN2003AIPWRG4 ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 UN2003AI
PACKAGE OPTION ADDENDUM
www.ti.com 14-Aug-2021
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
ULN2003AN ACTIVE PDIP N 16 25 RoHS & Green NIPDAU | SN N / A for Pkg Type -40 to 70 ULN2003AN
ULN2003ANE4 ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 70 ULN2003AN
ULN2003ANS ACTIVE SO NS 16 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ANSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ANSRE4 ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003ANSRG4 ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 70 ULN2003A
ULN2003APW ACTIVE TSSOP PW 16 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 70 UN2003A
ULN2003APWG4 ACTIVE TSSOP PW 16 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 70 UN2003A
ULN2003APWR ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 70 UN2003A
ULN2003APWRG4 ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 70 UN2003A
ULN2004AD ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -20 to 70 ULN2004A
ULN2004ADE4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -20 to 70 ULN2004A
ULN2004ADG4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -20 to 70 ULN2004A
ULN2004ADR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -20 to 70 ULN2004A
ULN2004ADRE4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -20 to 70 ULN2004A
ULN2004ADRG4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -20 to 70 ULN2004A
ULN2004AN ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -20 to 70 ULN2004AN
ULN2004ANE4 ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -20 to 70 ULN2004AN
ULN2004ANSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -20 to 70 ULN2004A
ULQ2003AD ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ULQ2003A
ULQ2003ADG4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM ULQ2003A
PACKAGE OPTION ADDENDUM
www.ti.com 14-Aug-2021
Addendum-Page 3
Orderable Device Status
(1)
Package Type Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
ULQ2003ADR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ULQ2003A
ULQ2003ADRG4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM ULQ2003A
ULQ2003AN ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 ULQ2003A
ULQ2004AD ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ULQ2004A
ULQ2004ADG4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM ULQ2004A
ULQ2004ADR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 ULQ2004A
ULQ2004ADRG4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM ULQ2004A
ULQ2004AN ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 ULQ2004AN

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

PACKAGE OPTION ADDENDUM
www.ti.com 14-Aug-2021
Addendum-Page 4
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.


OTHER QUALIFIED VERSIONS OF ULQ2003A, ULQ2004A :
• Automotive : ULQ2003A-Q1, ULQ2004A-Q1

NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
(mm)
Pin1
Quadrant
ULN2003ADR SOIC D 16 2500 330.0 16.8 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003ADRG3 SOIC D 16 2500 330.0 16.8 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003ADRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003ADRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003AIDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003AIDR SOIC D 16 2500 330.0 16.8 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003AIDRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2003AINSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
ULN2003AIPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
ULN2003AIPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
ULN2003AIPWRG4 TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
ULN2003ANSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
ULN2003APWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
ULN2003APWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
ULN2003APWRG4 TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
ULN2004ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Aug-2021
Pack Materials-Page 1
Device Package
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
(mm)
Pin1
Quadrant
ULN2004ADR SOIC D 16 2500 330.0 16.8 6.5 10.3 2.1 8.0 16.0 Q1
ULN2004ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2004ADRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2004ADRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULN2004ANSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
ULQ2003ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
ULQ2003ADRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
ULN2003ADR SOIC D 16 2500 364.0 364.0 27.0
ULN2003ADR SOIC D 16 2500 340.5 336.1 32.0
ULN2003ADR SOIC D 16 2500 853.0 449.0 35.0
ULN2003ADRG3 SOIC D 16 2500 364.0 364.0 27.0
ULN2003ADRG4 SOIC D 16 2500 367.0 367.0 38.0
ULN2003ADRG4 SOIC D 16 2500 340.5 336.1 32.0
ULN2003AIDR SOIC D 16 2500 340.5 336.1 32.0
ULN2003AIDR SOIC D 16 2500 364.0 364.0 27.0
ULN2003AIDRG4 SOIC D 16 2500 340.5 336.1 32.0
ULN2003AINSR SO NS 16 2000 853.0 449.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Aug-2021
Pack Materials-Page 2
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
ULN2003AIPWR TSSOP PW 16 2000 364.0 364.0 27.0
ULN2003AIPWR TSSOP PW 16 2000 853.0 449.0 35.0
ULN2003AIPWRG4 TSSOP PW 16 2000 853.0 449.0 35.0
ULN2003ANSR SO NS 16 2000 853.0 449.0 35.0
ULN2003APWR TSSOP PW 16 2000 364.0 364.0 27.0
ULN2003APWR TSSOP PW 16 2000 853.0 449.0 35.0
ULN2003APWRG4 TSSOP PW 16 2000 853.0 449.0 35.0
ULN2004ADR SOIC D 16 2500 853.0 449.0 35.0
ULN2004ADR SOIC D 16 2500 364.0 364.0 27.0
ULN2004ADR SOIC D 16 2500 340.5 336.1 32.0
ULN2004ADRG4 SOIC D 16 2500 340.5 336.1 32.0
ULN2004ADRG4 SOIC D 16 2500 853.0 449.0 35.0
ULN2004ANSR SO NS 16 2000 853.0 449.0 35.0
ULQ2003ADR SOIC D 16 2500 340.5 336.1 32.0
ULQ2003ADRG4 SOIC D 16 2500 853.0 449.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Aug-2021
Pack Materials-Page 3


www.ti.com
PACKAGE OUTLINE
C
14X 0.65
2X
4.55
16X 0.300.19
TYP6.66.2
1.2 MAX
0.15
0.05
0.25
GAGE PLANE
-80
B
NOTE 4
4.5
4.3
A
NOTE 3
5.1
4.9
0.75
0.50
(0.15) TYP
TSSOP - 1.2 mm max heightPW0016A
SMALL OUTLINE PACKAGE
4220204/A 02/2017
1
8
9
16
0.1 C A B
PIN 1 INDEX AREA
SEE DETAIL A
0.1 C
NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.

SEATING
PLANE
A 20DETAIL A
TYPICAL
SCALE 2.500
www.ti.com
EXAMPLE BOARD LAYOUT
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
16X (1.5)
16X (0.45)
14X (0.65)
(5.8)
(R0.05) TYP
TSSOP - 1.2 mm max heightPW0016A
SMALL OUTLINE PACKAGE
4220204/A 02/2017
NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SYMM
SYMM
1
8 9
16
15.000
METALSOLDER MASKOPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
EXPOSED METALEXPOSED METAL
SOLDER MASK DETAILS
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
www.ti.com
EXAMPLE STENCIL DESIGN
16X (1.5)
16X (0.45)
14X (0.65)
(5.8)
(R0.05) TYP
TSSOP - 1.2 mm max heightPW0016A
SMALL OUTLINE PACKAGE
4220204/A 02/2017
NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
SYMM
SYMM
1
8 9
16


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