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1172 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 59, NO. 4, APRIL 2012
On the Switching Parameter Variation of
Metal-Oxide RRAM—Part I: Physical Modeling
and Simulation Methodology
Ximeng Guan, Member, IEEE, Shimeng Yu, Student Member, IEEE, and H.-S. Philip Wong, Fellow, IEEE
Abstract—The variation of switching parameters is one of the
major challenges to both the scaling and volume production of
metal-oxide-based resistive random-access memories (RRAMs).
In this two-part paper, the source of such parameter variation
is analyzed by a physics-based simulator, which is equipped with
the capability to simulate a large number (∼1000) of cyclic SET–
RESET operations. By comparing the simulation results with
experimental data, it is found that the random current fluctua-
tion experimentally observed in the RESET processes is caused
by the competition between trap generation and recombination,
whereas the variation of the high resistance states and the tail bits
are directly correlated to the randomness of the trap dynamics.
A combined strategy with a bilayer dielectric material and a
write-verification technique is proposed to minimize the resistance
variation. We describe the simulation methodology and discuss the
dc results in Part I. The corroboration of the model and the device
optimization strategy will be discussed in Part II.
Index Terms—Device modeling, dielectric breakdown, fluctua-
tions, metal oxide, resistive switching memory (RRAM), switching
parameter variation.
I. INTRODUCTION
THE METAL–OXIDE resistive random access memory(RRAM) is extensively studied as a competitive candidate
for future nonvolatile memory application due to its simple
structure, fast switching speed, great scalability, and compati-
bility with silicon complementary metal–oxide–semiconductor
(CMOS) technology [1]–[3]. Among dozens of switching oxide
materials, NiO [4], WOx [5], HfOx [6], [7], TaOx [8], [9],
and AlOx [10]-based memory devices have shown excellent
reliability, including long endurance and stable retention at
elevated temperature. A 4-Mb macrochip based on HfOx mem-
Manuscript received September 26, 2011; accepted January 10, 2012. Date
of publication February 14, 2012; date of current version March 23, 2012.
This work was supported in part by the member companies of the Stanford
Non-Volatile Memory Technology Research Initiative, the National Science
Foundation (NSF) under Grant ECCS 0950305, the Nanoelectronics Research
Initiative (NRI) of the Semiconductor Research Corporation through the
NSF/NRI Supplement to the NSF NSEC Center for Probing the Nanoscale,
and the MSD and the C2S2 Focus Center, which are two of the six research
centers funded under the Focus Center Research Program (a Semiconductor
Research Corporation subsidiary). The work of S. Yu was supported by the
Stanford Graduate Fellowship. The review of this paper was arranged by Editor
V. R. Rao.
The authors are with the Center for Integrated Systems and the Department of
Electrical Engineering, Stanford University, Stanford, CA 94305 USA (e-mail:
ximeng@stanford.edu; simonyu@stanford.edu; hspwong@stanford.edu).
Digital Object Identifier 10.1109/TED.2012.2184545
ory has been demonstrated [11]. However, the key obstacle
for metal–oxide RRAM to becoming mature for large-scale
manufacturing is relatively poor control of switching unifor-
mity. Significant parameter fluctuations exist in the switching
voltages, as well as the resistance distributions, which include
temporal fluctuations (cycle to cycle) and spatial fluctuations
(device to device). A large memory array usually contains
noticeable tail bits in the resistance distribution [12], which re-
markably reduces the resistance window and therefore imposes
a great challenge to realizing the multilevel capability of the
metal–oxide RRAM technology.
The origin of the variations in the resistive switching is not
well understood yet, despite the fact that the variations are
observed in all RRAMs reported. Phenomenological models
such as the network of random circuit breakers [13] have been
applied to unipolar1 RRAM devices. In this paper, this problem
is studied for the metal–oxide-based bipolar RRAM devices.
Through the development of a physics-based stochastic simula-
tor to quantify the switching variations, we identify the major
sources of variations and fluctuations. The obtained insights
provide guidelines for future device design and optimization
against the undesired switching parameter variations. In Part I
of this paper, we describe the developed model, which in-
cludes the trap-assisted-tunneling (TAT) current solver and the
stochastic generation and recombination of oxygen vacancies
(Vo). The considerations and approximations to reproduce the
switching characteristics of a bipolar RRAM device are dis-
cussed. In Part II of the paper [14], we corroborate the simu-
lation results with the experimental data of HfOx-based RRAM
devices [15], [16], such as dc I–V switching characteristics
and pulse transient switching waveform, multilevel resistance
distribution, etc., with a focus on discussing the origin of the
tail bits problem and possible elimination methods such as the
use of the write–verify technique and a bilayer oxide device
structure.
II. MODEL DESCRIPTION
A widely recognized bipolar switching physical picture [17]
is shown in Fig. 1 The transition between the high resistance
state (HRS) and the low resistance state (LRS) has been
1Here, unipolar means the set from the HRS to the LRS and the reset from
LRS to HRS occur at the same voltage polarity, and bipolar means the set and
the reset occur at opposite voltage.
0018-9383/$31.00 © 2012 IEEE
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GUAN et al.: ON SWITCHING PARAMETER VARIATION OF METAL-OXIDE RRAM 1173
Fig. 1. Schematics of the SET/RESET mechanisms in a metal–oxide-based
RRAM cell. In a SET process, oxygen ions are pulled out of the lattice and
drift to the active electrode, leaving behind the conducting filaments formed
by Vo, which causes the decrease in resistance. When a reverse bias is applied
in a RESET process, the stored oxygen ions at the electrode/dielectric interface
migrate into the dielectric, recombining with the Vo and rupturing the filaments,
leading to an increase in resistance.
attributed to the formation and rupture of conductive filaments
(CFs) in the oxide, which may consist of Vo (serving as traps)
or metal precipitates [18], [19]. Joule heating [20] and electric-
field-assisted migration of oxygen ions/vacancies [21] have
been suggested to play an important role in the switching.
Specifically, the FORMING/SET process of the memory cell
(transition from HRS to LRS) is interpreted as a dielectric soft
breakdown associated with the generation of oxygen vacancies
and the migration of oxygen ions toward the electrode/oxide
interface (where they are stored), leaving behind the oxygen
vacancies or metal precipitates in the bulk oxide to form
percolation-conducting paths [20], [21]. The RESET of the
device is associated with the process in which the oxygen
ions from the anode/dielectric interface migrate back into the
dielectric layer, recombining with the oxygen vacancies (or
equivalently, oxidizing the metal precipitates) and thus ruptur-
ing the conducting filaments [20], [21].
In essence, the generation/recombination of oxygen vacan-
cies is a stochastic process that is similar to the well-known
randomness of dielectric breakdown [22]. The description of
the resistive switching of oxide-based RRAM must take into
consideration the behaviors of both electrons and ions and
reflect the nature of this randomness. To restrict the simulation
within a reasonable computation resource, the adiabatic approx-
imation is adopted, which allows us to describe the behaviors
of electrons and ions in a decoupled manner by treating the
conductance of the cell as a function of Vo positions (which will
be referred to as Vo configurations hereafter). The electronic
part involved in the operation of the cell has been discussed in
an experimental work in [23] and [24], which concludes that
the TAT through the Vo is the dominant conduction mechanism
in the cell. Similar mechanisms have also been identified by
the first principle study of RRAM cells [25]. Based on these
studies, a TAT current solver is developed in this work to
evaluate the current and the resistance at a given Vo config-
uration. The Vo configurations determined by ion dynamics
are simulated based on the migration velocity of ions and the
generation/recombination probability of Vo.
A programming cycle (i.e., FORMING/SET/RESET) of the
memory cell is divided into multiple time steps, each assumed
be a quasi-steady process. At the end of each time step, the
Vo configuration is updated according to the Vo dynamics
previously described, which is used by the TAT solver to
calculate the electrical current. The temperature of the cell is
then updated for the calculation of configuration in the next
step.
We now discuss the TAT solver and Vo dynamics in more
detail.2
A. Electron Transport by the TAT-Solver
In the dielectric region of a HfOx-based RRAM, the current
continuity equation is the in the form of [26]
dfn
dt
= (1− fn)
N∑
m=1
′Rmnfm − fn
N∑
m=1
′Rnm(1− fm)
+
(
RiLn + R
iR
n
)
(1− fn)−
(
RoLn + R
oR
n
)
fn (1)
with fn ∈ [0, 1] being the electron occupation probability of the
nth trap, Rmn being the electron hopping rate from trap m to
n, RoLn /R
oR
n being the electron hopping rate from trap n to the
left/right electrode, and RiLn /RiRn being the electron hopping
rate from the left/right electrode to trap n. Σ′ stands for the
summation over all integers, except n. As reported by different
authors, the oxygen vacancies, which are positively charged to
+1, are thermodynamically favored in TAT [24], [27], [28].
In a quasi-steady state, (1) becomes
(1− fn)
N∑
m=1
′Rmnfm − fn
N∑
m=1
′Rnm(1− fm)
+
(
RiLn + R
iR
n
)
(1− fn)−
(
RoLn + R
oR
n
)
fn = 0. (2)
The current flowing through the cell can be calculated by
evaluating the electron flux through a cross section near, for
example, the left electrode, i.e.,
IL = −q
N∑
n=1
[
(1− fn)RiLn −RoLn fn
]
. (3)
Summing (2) over n, it can be proved that I = IR = IL.
The hopping rate between two vacancies can be calculated
by the Mott hopping model [29], [30]
Rnm = R0 exp
[
−rnm
a0
+
qV Hmn
kT
]
(4)
with R0 ≈ 1012 Hz being the vibration frequency of an elec-
tron, rnm = |rm − rn| being the distance between the two
vacancies, a0 being the attenuation length of the electron
wave function, V Hmn ≈ −FH(rm − rn) ≈ V H(rm)− V H(rn)
2In the subsequent discussions of this paper, Vo and traps are interchangeable
concepts both representing the oxygen vacancies.
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1174 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 59, NO. 4, APRIL 2012
TABLE I
PARAMETERS USED IN THIS WORK TO SIMULATE THE HfOx-BASED RRAM
being the change of barrier height due to the applied ex-
ternal field [31], and V H(rn) being the homogeneous com-
ponent of the local electric potential to be described in
Section II-C.
The hopping rates between a trap and an electrode are
RiL,Rn =R
0
tunnelN
L,R
(
E+v
)
FL,Rin
(
E+v
)
TL,R,+n
ROL,Rn =R
0
tunnelN
L,R (E•v)F
L,R
out (Ev)T
L,R,•
n (5)
where R0tunnel is the coupling strength between the trap and the
electrode, with the unit of a tunneling rate. NL,R is the number
of states at the given energy in the electrode. The product
of R0tunnelNL,R is fitted to experiments for a specific con-
tact electrode and dielectric material (value listed in Table I).
E+v (E
•
v) is the energy of an empty (a filled) trap deter-
mined by
E+,•v (rn) = E
+,•
v0 − qV H(rn) (6)
with E+v0 (E•v0) located below the conduction band of HfOx.
TL,R,+•n is the tunneling probability from the left/right elec-
trode into the trap, given by the Wentzel–Kramers–Brillouin
approximation in (7), shown at the bottom of the next page,
with xn being the xth component of rn, L being the thickness
of the dielectric layer, and m∗ = 0.1m0 being the tunneling
effective mass for HfOx [32]. FL,Rin (E+v ) is the Fermi integral
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GUAN et al.: ON SWITCHING PARAMETER VARIATION OF METAL-OXIDE RRAM 1175
representing the number of filled states in the electrode above
E+v , which can inject electrons into trap n, i.e.,
FL,Rin
(
E+v
)
=
+∞∫
E+v0−qV (xn)
f
[
E − (ELRF − qV LR)] dE
=
+∞∫
E+v0−qV (xn)
1
1 + exp
[(
E − (ELRF − qV LR)) /kT ]dE
(8)
with ELRF being the Fermi level in the left/right electrode, and
V LR being the applied bias on the left/right contact. Similarly,
FL,Rout (E−v ) is the Fermi integral representing the number of
empty states in the electrode below E−v , which can accept
electrons from trap n, i.e.,
FL,Rout
(
E−v
)
=
E−v0−qV (xn)∫
−∞
{
1− f [E − (ELRF − qV LR)]} dE
=
E−v0−qV (xn)∫
−∞
1
1 + exp
[((
ELRF − qV LR
)− E) /kT ]dE.
(9)
Note that, due to the limit of computation resource, we have
assumed that, with the assistance of phonons, all the electrons
in the electrode above E+v can be injected into trap n with the
same probability as an elastic tunneling process. Similarly, all
the empty states in the electrode below E−v are assumed to be
able to accept injected electrons from trap n with a constant
probability. A more rigorous and computationally demanding
description of inelastic tunneling will inevitably require the
consideration of electron–phonon interactions for all the hop-
ping events, thus introducing another factor in (4) and (5),
respectively (see, e.g., [30] and [33]). The simplification in
our simulation by lumping the inelastic factor into the fitting
parameters of R0 and R0tunnel may not fully account for the
temperature dependence of phonon-assisted tunneling. It is
adopted here mainly to improve computational efficiency.
For a given Vo configuration, the hopping rates are evaluated
by (4)–(9) and substituted into (2), which then can be solved
using a Newton–Raphson iteration scheme.
B. Generation/Recombination of Oxygen Vacancies
When an external field is applied to the dielectric material,
the oxygen ions can be pulled out of their equilibrium position,
generating the oxygen vacancies. The generation probability of
an oxygen vacancy on each lattice site (mesh point) during a
time interval [τ, τ + t] is approximated as
PG(F eq, T, t) =
t
t0
exp [− (Ea − γ|F eq|) /kT ] (10)
where 1/t0 = 1013 Hz is the characteristic vibration frequency
of the oxygen ions [34]. Ea ≈ 1 eV is fitted as the height of
the migration barrier, which an oxygen ion must overcome to
break out from its equilibrium position, which is close to the
reported values from experiments [35], [36]. F eq is the local
electric field felt by the ion in its equilibrium position, and γ
is a coefficient representing the local enhancement factor due
to the electric field [37]. It should be noted that this generation
process depends only on the magnitude of the electric field and
may happen during the entire operation cycle of a memory cell,
including the RESET process when oxygen vacancies are being
annihilated.
The reverse process of Vo generation is Vo recombination.
This mainly happens in a RESET process, during which the
oxygen ions are pulled back from the electrode/dielectric in-
terface and captured by the Vo inside the dielectric layer.
In equilibrium state with no field applied, the recombination
events balance with the generation events; thus
P 0R = PG(F
eq = 0, T, t) = t
t0
exp(−Ea/kT ). (11)
When excess oxygen ions are present, Vo recombination is
given by
PR = βP 0R (12)
where β ∝ Co2− , with Co2− being the concentration of oxygen
ions. Ideally, the concentration of oxygen ions should be ob-
tained from the numerical solution of the ion transport equation
[21]. However, this becomes computationally expensive when
a large number of operation cycles need to be simulated. To
achieve a balance between accuracy and efficiency, we approx-
imate β with the following analytical form:
β(x, t) ≈ β0 exp(−vt/Lp)u(x, t) (13)
where Lp is the decaying length of ion concentration, and v is
the field-driven wave-front velocity of oxygen ions determined
TL+,•n = exp
−2
xn∫
0
1
√
2m∗
[
EC −E+,•v0 − qV H(x) + qV H(xn)
]
dx
, E±v (xn) < EC − qV H(x)
TR+,•n = exp
−2
L∫
xn
1
√
2m∗
[
EC −E+,•v0 − qV H(x) + qV H(xn)
]
dx
, E±v (xn) < EC − qV H(x) (7)
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1176 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 59, NO. 4, APRIL 2012
by [21]
v =
a
t0
exp(−Em/kT ) sinh(qγdriftF/kT ) (14)
with F = −∇V H being the electric field felt by a mobile
oxygen ion, Em being the migration barrier for oxygen ions,
a ≈ 0.25 nm being the lattice constant (also the mesh size),
and γdrift being the enhancement coefficient related to the local
dielectric constant of the material [37]. u(x, t) describes the
diffusive behavior of oxygen ions and can be approximated by
a complementary error function. In this paper, it is tabulated as
u(x, t) =
1, x ≤ vt
0.3, vt < x ≤ vt + a
0.1, vt + a < x ≤ vt + 3a
0, x > vt + 3a.
(15)
At the end of each simulation time step, (10) and (12) are
evaluated to determine the Vo configurations. Then, the current
is evaluated by the TAT solver. We have used different values of
the enhancement factor for ion drift (γdrift) and vacancy gener-
ation (γ) and for different operation processes (SET/RESET). It
is found that, although the theoretical value of the enhancement
factor can be related to the permittivity of the material [37],
using a single value can hardly make the simulation result
agree with measured I–V . We believe that this is due to the
variation of local permittivity at different resistance states and
different pulse frequencies. Therefore, the enhancement factor
is separately fitted for different processes (values summarized
in Table I).
C. Electrical Potential and Temperature
The electrical potential inside the cell satisfies the Poisson
equation
−∇2V = ρ
ε
(16)
with the boundary conditions defined by the applied voltage at
the contact electrodes
V (x = 0) = V L V (x = L) = V R. (17)
The solution can be divided into the homogeneous component
V H and the nonhomogeneous component V N . V H satisfies
the homogeneous counterpart of (16) and the nonhomogeneous
boundary condition of (17), i.e.,
−∇2V H = 0
V H(x = 0) = V L
V H(x = L) = V R
(18)
whereas V N satisfies the nonhomogeneous equation of (16) and
the homogeneous counterpart of (17), i.e.,
−∇2V N = ρε
V N (x = 0) = 0
V N (x = L) = 0.
(19)
Therefore, V N can be understood as the local Coulomb poten-
tial due to the presence of partially depleted Vo, and V H can be
understood as the change of local potential superimposed onto
V N due to the applied external bias at the boundaries. Accord-
ing to [31], the change of the local barrier height between two
traps is proportional to the homogeneous component (i.e., V H )
to the first order. Therefore, the solution of (18) is used in each
time step to compute the trap-to-trap hopping probability in (4).
The electric field F eq in (10) is different from the change
of barrier height previously discussed, in that it is the field felt
by an oxygen ion in its equilibrium position. In this paper, we
have adopted a simplified picture and assume the following:
1) The field felt by the ions are along the direction normal to the
electrode pads. 2) The formed filaments can be approximated as
bodies with equipotential. Assuming that the F eq is along the
x-direction, this enables us to estimate the force on an oxygen
ion by
|F eq(x = ia, y = ja)| = |V
R − V L|
L− a
M∑
i=1
δij,Vo
(20)
where i and j are mesh indices. δij,Vo takes the value of 1 if
there is a Vo at site (i, j) or the value of 0 otherwise. This
approximation has neglected the nonnormal field component
around the filament tips. However, considering the fact that the
underestimated field components are relatively small as com-
pared to the local variation of material parameters and field and
that the growth of filaments along a nonorthogonal direction
do not have a first-order contribution to the cell’s resistance,
neglecting these additional components is not expected to lead
to a substantially different behavior of the statistical distribution
of the final resistance.
The local temperature plays an important role in both SET
and RESET processes. Generally, the temperature distribution
can be obtained by solving the heat transfer equation, with
multiple heat sources due to the inelastic electron–phonon
interactions [38]. In this paper, we have adopted a simplified
picture, in which the temperature is assumed to be uniform
in the vicinity of the filaments and is correlated to the Joule
heating by [20]
T = 297 K +
∣∣(V L − V R)I∣∣Rth (21)
where V L and V R are the applied bias on the two electrodes,
I is the current flowing through the nearby filaments, and Rth
is an equivalent thermal resistance representing the impact of
Joule heating on the temperature [20]. This leads to a typical in-
crease of temperature during the SET process by around 170 K.
All the parameters used in (4)–(21) for our simulation are
listed in Table I.
D. Implementation of a Current Compliance
A current compliance is normally required during the SET
and FORMING processes to control the uniformity of the
resistance during different cycles. The current compliance can
be enforced, e.g., by a semiconductor parameter analyzer or
a selection transistor in series with the RRAM. There are
multiple options to implement this compliance in a simulation,
depending on the test configuration in the experiments. In this
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GUAN et al.: ON SWITCHING PARAMETER VARIATION OF METAL-OXIDE RRAM 1177
Fig. 2. Flow chart of the fast simulator developed in this work for the study
of switching parameter variations.
paper, we have adopted a trial-and-error strategy to ensure that
the current overshoot is within a specified tolerance above the
current compliance. At the beginning of a new time step, the
latest Vo configuration is stored. A trial time step is used to
generate the Vo configuration and current. If the current is be-
low the compliance plus the tolerance, the step size is accepted.
Otherwise, the initial guess is rejected, and a smaller step size
is used to generate the Vo configuration and current again. The
test loop goes on until the step size is sufficiently small, so
that the current is below the compliance plus the tolerance.
The final accepted time step corresponds to the characteristic
response time of an external current limiter or the transient
time determined by the parasitic capacitance. Once the current
exceeds the compliance, the SET or FORMING process will
stop after the next accepted time step.
E. Simulation Flow
Equations (1)–(21) apply to 1-D–3-D systems. The choice
of dimension is a function of the simulation purpose. Because
the goal of this work is to study the variation and fluctuation
of device parameters, which requires a large number of re-
peated simulations, we have implemented the model in a 2-D
memory cell, which includes sufficient stochastic property of
an RRAM cell while keeping the simulation within acceptable
computation load. The physics along the third dimension is
lumped into the number of states (NL,R) in (5), which is fitted
to experimental results to minimize the impact due to the lack
of freedom along the third dimension. The simulation flow is
shown in Fig. 2, which applies to the processes of FORMING,
SET, and RESET, and can be configured to be either a dc-sweep
Fig. 3. One-dimensional single vacancy chain formed by oxygen vacancies.
The vacancy chain is connected to the right electrode but disconnected to the
left electrode with a gap in between.
analysis (in which the input voltage increases or decreases
linearly with time) or a pulse programming cycle for statistical
analysis (in which the input voltage is a rectangular pulse).
In the FORMING process, an initial Vo configuration is
generated by randomly placing a specified number of Vo in the
simulated region, representing the weak spot of an as-fabricated
HfOx RRAM cell. The voltage across the cell then ramps up
with a rate of 1 V/s in a dc sweep. In a pulse operation, a
pulse voltage is applied instead with a limited time width. The
TAT solver and the Vo dynamics are repeatedly invoked to
check the resistance of the cell during the process, until the
specified compliance is reached with the trial-and-error strategy
previously explained.
The RESET process begins with a Vo configuration after the
FORMING or the previous SET process, which corresponds to
an HRS. A reverse bias is applied to the cell, and the voltage
ramps up with a rate of 1 V/s. (In a pulse operation, a reverse
pulse voltage is applied instead with a limited time width.) The
wavefront of oxygen ions begins to move into the cell when the
temperature and field are sufficiently high. The recombination
dominates the generation due to the high oxygen concentration
in the ruptured region, causing the current to drop when the per-
colation paths or filaments are ruptured. The process ends when
a specified voltage maximum is reached and the dc voltage
sweeps back to zero, or when the applied pulse has ended.
The SET process is similar to the FORMING process, except
that it starts from the Vo configuration after the previous RESET
process, where the filaments in the cell are partially ruptured.
The SET/RESET processes are concatenated and repeated by
multiple times in the simulation to study the distribution of HRS
and RESET voltage.
III. ONE-DIMENSIONAL VO CHAIN
Before discussing the dc I–V characteristics and variations
in a 2-D HfOx RRAM cell, it is inspiring to discuss the model’s
observations for a 1-D Vo chain first. Consider the case in which
there is only one chain of Vo between the two electrodes of
an RRAM cell, as shown in Fig. 3. The conducting current
has been mainly attributed to the electrons that tunnel from
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1178 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 59, NO. 4, APRIL 2012
Fig. 4. I–V characteristics of the 1-D vacancy chain with different gap
sizes. The inset shows the exponential decrease in current with increasing gap
distance, which explains the HRS variation.
Fig. 5. Electron occupancy along a 1-D vacancy chain under different bias
voltages in LRS and HRS. In the HRS, the increase in voltage causes depletion
to the traps near the cathode and makes the cathode-to-trap tunneling the bottle
neck of the entire conduction path.
the cathode into the closest trap in the dielectric, then hop
through the chain of traps, and finally tunnel into the anode.
Consider the case in which a test voltage is applied to the
cell such that the left and right electrodes serve as the cathode
and anode, respectively. In addition, assume that the chain is
connected with the anode, whereas it is disconnected from the
cathode with a certain gap. The electron from the cathode must
tunnel through the ruptured gap before it hops through the
chain to the anode on the right side. Conduction through this
chain is therefore determined by the bottleneck in the ruptured
region. Since the tunneling probability exponentially depends
on the gap size, the current through the cell has an exponential
dependence on the ruptured gap size, which is verified by
the output of the TAT solver in Fig. 4. The variation in the
gap size therefore is expected to exert a significant impact on
the HRS.
Fig. 5 shows the electron distributions in the traps for both
a complete Vo chain connecting both electrodes and a ruptured
Vo chain previously described. It is observed that an increas-
ingly negative (reverse) bias on the left electrode (which works
as a cathode) drives the electrons to the right electrode (which
works as an anode). In the case of a complete Vo chain, this
causes the electrons to pile up near the anode region. In the
Fig. 6. Two-dimensional electron occupancy in the HRS when a reverse bias
is applied. The front line of filaments is not straight due to the stochastic nature
of Vo generation and recombination. The variation of the gap distance is the
origin of the HRS variation.
other case where the chain is partially ruptured near the left
electrode, the gap between the left electrode and the leftmost
trap becomes a bottleneck for conduction. Therefore, under a
reverse bias, the traps near the left electrode (cathode) tend to
be depleted in order to accept sufficient electron flux from the
cathode to retain the current continuity [see (1)]. The depleted
Vo are more positively charged and hence more likely to capture
the negatively charged oxygen ions. Therefore, the Vo near
the cathode has higher probability to be recombined during a
RESET process.
IV. DC SWEEP ANALYSIS
Fig. 6 shows the electron occupancy in a 2-D case, where
the gap size varies along the lateral direction of the cell. In the
following sections of this paper, we discuss the application of
the model for a 2-D HfOx RRAM cell. More results with exper-
imental corroboration on RESET current fluctuation, RESET
voltage variation, and the HRS tail bits will follow in Part II of
this paper.
Fig. 7(a) shows an as-fabricated metal–HfOx–metal structure
simulated in this work. The thickness of the dielectric layer is
10 nm, with two electrodes on the left and right boundaries.
The simulated region is 10 nm along the pad direction and
10 nm along the thickness direction, which can be regarded
as a weak portion of an experimental memory cell, e.g., the
grain boundary or the as-fabricated defect rich region, where
the filaments concentrate [24]. We will discuss the FORMING,
RESET, and SET operations in a sequential order according to
the dc simulation flow.
A. Forming
The as-fabricated memory cell is in an HRS with no es-
tablished filaments but multiple randomly distributed Vo as
defects. During the FORMING process, a positive voltage is
applied on the active electrode (in this case, the left electrode),
building up a strong field, which increases the probability of
Vo generation. The filaments start to grow around the initial
Vo when the voltage is sufficiently high. Formed segments of
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GUAN et al.: ON SWITCHING PARAMETER VARIATION OF METAL-OXIDE RRAM 1179
Fig.
7. DC sweep simulation of a 10 nm × 10 nm RRAM region, corresponding to
the weak spot of the cell. (a) As-fabricated state of the region, with
the Vo
randomly distributed in an initial configuration. (b) I–V
characteristics of a FORMING process. (c) Percolation paths after
forming. (d) I–V characteristics of
RESET with different stop
voltages. (e) and (f) Smaller/larger gap sizes due to the smaller/larger
RESET stop voltages. (g) SET processes with different current
compliances.
(h) and (i) Fewer/more Vo and percolation paths due to the
smaller/larger current compliance. Percolation paths are identified by
the Dijkstra shortest
path algorithm and color coded according to the conducting strength (darker means stronger).
the filament are approximated by equipotential bodies, making
the field in the gap regions between the segments stronger [see
(20)]. In addition, the increased current causes the temperature
to rise by the Joule heating effect in (21). Both effects lead
to the faster generation of Vo, which causes further increase
in field and temperature. The positive feedback shows up in
the I–V curve in Fig. 7(b) as a steep slope, which finally
exceeds the current compliance and causes a current overshoot.
After FORMING, the simulated weak spot of the cell contains
more Vo than the initial state. Applying the Dijkstra’s shortest-
path algorithm [39] allows us to visually identify the most
conducting percolating paths (which form a filament) in the
layer. We would like to point out that the formalism used in this
work does not fully include the correlation between different
vacancy generation events due to the lack of knowledge of such
correlation strength. Therefore, more work is required if the
details of correlated growth of filaments should be resolved.
B. Reset
In a RESET process, a negative voltage is applied on the
left electrode, making it a cathode from which the accumulated
oxygen ions start to drift into the dielectric layer. When the ions
get close to the depleted Vo, they recombine with Vo, resulting
in the filament dissolution and an increase in resistance of the
simulated structure. Fig. 7(d) shows the I–V characteristics of
two RESET processes, which start from the same Vo configu-
ration but sweeps to two different voltages. Key observations
include the following: 1) A larger RESET voltage results in
a larger gap distance and a correspondingly higher resistance
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1180 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 59, NO. 4, APRIL 2012
after the RESET. 2) A fluctuation characterized by multiple
rising and falling steps of the current exists during the gradual
resistive switching. 3) The resulting Vo configurations shown
in Fig. 7(e) and (f) feature a randomness in the front line of the
ruptured filaments.
The first observation can be understood by noticing the fact
that the length of the rupture region of the filaments is a function
of voltage and time. With a constant ramp-up rate, sweeping to
a higher stop voltage in a RESET process leads to both higher
velocity and longer drift time of ions. In addition, the difference
in velocity may be further amplified by the difference in the
temperature. Therefore, a higher stop voltage in a dc sweep
generally results in a larger average gap, leading to a higher
resistance after RESET.
The second observation of current fluctuation is related to
the competition between Vo generation and recombination.
Although Vo recombination dominates in a RESET process, the
high field may also induce Vo generation in the gap region. This
is particularly prominent in the beginning phase of the current
drop when the gap size is small and the field and temperature
are both high. The generated Vo in the gap reconnect the
ruptured filament with the cathode, giving rise to a momentary
increase in current during RESET. The newly generated Vo are
mostly recombined soon, because the recombination probabil-
ity is much higher than that of generation due to the overwhelm-
ingly high concentration of oxygen ions present in the rupture
gap. Therefore, the current drops again, resulting in a ran-
dom fluctuation superimposed on the decreasing I–V curves.
A similar fluctuation of current is also observed in a pulse
RESET operation in both simulation and experiments. The
results and corresponding impacts on the switching parameter
variation will be shown and discussed in Part II of this paper.
The third observation on the random edge of the gap region
is attributed to the stochastic nature of Vo recombination. In
a large number of RESET tests, the average gap distance is
expected to follow a normal distribution, which leads to a
normal distribution of the HRS in the log scale according to the
exponential dependence of resistance on the gap distance, as
discussed in the simplified 1-D Vo chain model. Understanding
this correlation between the variation of HRS and the random-
ness of the gap distance is the key to the optimization of the cell
structure. Detailed design options will be discussed in Part II of
this paper.
C. Set
The SET process is simulated in a similar way as the FORM-
ING process, except that it starts from the Vo configuration after
the previous RESET. Fig. 7(g) shows the I–V characteristics of
two SET processes. which start from the same Vo configuration
but have two different current compliance levels. It is observed
that a larger compliance level generally results in more Vo (thus
more filaments) after the SET process. This agrees with a recent
experimental measurement [40]. Therefore, the restriction of
current overshoot is important to the control of variation in the
LRS resistance.
Comparing the Vo configurations after SET and FORMING,
it is observed that the Vo distribution after FORMING is more
random than those after several SET and RESET cycles. This
implies that filaments tend to regrow from the same weak
spots in different SET cycles, which explains the stabilization
of the SET voltage after the first few cycles. Experiments
have also shown that the initial FORMING process generally
requires a high voltage than the stabilized SET voltage. From
the simulation, it is clear that this is because FORMING starts
from a configuration with fewer Vo, whereas SET starts from a
configuration with partially ruptured filaments.
V. CONCLUSION
A hybrid methodology has been developed in this work to
simulate the resistive switching of metal–oxide RRAM cells.
The simulation framework includes both a deterministic TAT
solver for the electron transport and a stochastic description
of the Vo dynamics during the switching processes. Com-
bining both aspects enables us to simulate the complete dc
and pulse switching behaviors of the RRAM cell. Despite the
simplification along the third dimension and the assumptions
of uniform material parameters and the global temperature,
the approach successfully reveals the correlation between the
terminal I–V curves and the stochastic Vo dynamics inside
the switching material. The development of the simulation tool
opens up the possibility to systematically study the variation of
switching parameters in the metal–oxide RRAM cells, as will
be discussed in Part II of this paper.
REFERENCES
[1] R. Waser, R. Dittmann, G. Staikov, and K. Szot, “Redox-based resistive
switching memories–Nanoionic mechanisms, prospects, and challenges,”
Adv. Mater., vol. 21, no. 25/26, pp. 2632–2663, Jul. 2009.
[2] H. Akinaga and H. Shima, “Resistive random access memory (ReRAM)
based on metal oxides,” Proc. IEEE, vol. 98, no. 12, pp. 2237–2251,
Dec. 2010.
[3] S. Yu, B. Lee, and H.-S. P. Wong, “Metal oxide resistive switching
memory,” in Functional Metal Oxide Nanostructures, J. Q. Wu, Ed.
Berlin, Germany: Springer-Verlag, 2011.
[4] I. G. Baek, M. S. Lee, S. Seo, M. J. Lee, D. H. Seo, D.-S. Suh, J. C. Park,
S. O. Park, H. S. Kim, I. K. Yoo, U.-I. Chung, and I. T. Moon, “Highly
scalable nonvolatile resistive memory using simple binary oxide driven
by asymmetric unipolar voltage pulses,” in IEDM Tech. Dig., 2004,
pp. 587–590.
[5] W. C. Chien, Y. R. Chen, Y. C. Chen, A. T. H. Chuang, F. M. Lee,
Y. Y. Lin, E. K. Lai, Y. H. Shih, K. Y. Hsieh, and C.-Y. Lu, “A forming-
free WOx resistive memory using a novel self-aligned field enhancement
feature with excellent reliability and scalability,” in IEDM Tech. Dig.,
2010, pp. 440–443.
[6] H. Y. Lee, Y. S. Chen, P. S. Chen, P. Y. Gu, Y. Y. Hsu, S. M. Wang,
W. H. Liu, C. H. Tsai, S. S. Sheu, P. C. Chiang, W. P. Lin, C. H. Lin,
W. S. Chen, F. T. Chen, C. H. Lien, and M.-J. Tsai, “Evidence and solution
of over-RESET problem for HfOx based resistive memory with sub-
ns switching speed and high endurance,” in IEDM Tech. Dig., 2010,
pp. 460–463.
[7] J. Lee, J. Shin, D. Lee, W. Lee, S. Jung, M. Jo, J. Park, K. P. Biju,
S. Kim, S. Park, and H. Hwang, “Diode-less nano-scale ZrOx/HfOx
RRAM device with excellent switching uniformity and reliability for
high-density cross-point memory applications,” in IEDM Tech. Dig.,
2010, pp. 452–455.
[8] Z. Wei, Y. Kanzawa, K. Arita, Y. Katoh, K. Kawai, S. Muraoka, S. Mitani,
S. Fujii, K. Katayama, M. Iijima, T. Mikawa, T. Ninomiya, R. Miyanaga,
Y. Kawashima, K. Tsuji, A. Himeno, T. Okada, R. Azuma, K. Shimakawa,
H. Sugaya, T. Takagi, R. Yasuhara, K. Horiba, H. Kumigashira, and
M. Oshima, “Highly reliable TaOx ReRAM and direct evidence of redox
reaction mechanism,” in IEDM Tech. Dig., 2008, pp. 293–296.
[9] M.-J. Lee, C. B. Lee, D. Lee, S. R. Lee, M. Chang, J. H. Hur, Y.-B. Kim,
C.-J. Kim, D. H. Seo, S. Seo, U.-I. Chung, I.-K. Yoo, and K. Kim, “A
Authorized
licensed use limited to: TUFTS UNIV. Downloaded on March 22,2023 at
20:47:11 UTC from IEEE Xplore. Restrictions apply.
GUAN et al.: ON SWITCHING PARAMETER VARIATION OF METAL-OXIDE RRAM 1181
fast, high-endurance and scalable non-volatile memory device made from
asymmetric Ta2O5−x/TaO2−x bilayer structures,” Nat. Mater., vol. 10,
pp. 625–630, Jul. 2011.
[10] W. Kim, S. I. Park, Z. Zhang, Y. Yang-Liauw, D. Sekar, H.-S. P. Wong,
and S. Wong, “Forming-free nitrogen-doped AlOx RRAM with sub-µA
programming current,” in VLSI Symp. Tech. Dig., 2011, pp. 22–23.
[11] S.-S. Sheu, M.-F. Chang, K.-F. Lin, C.-W. Wu, Y.-S. Chen, P.-F. Chiu,
C.-C. Kuo, Y.-S. Yang, P.-C. Chiang, W.-P. Lin, C.-H. Lin, H.-Y. Lee,
P.-Y. Gu, S.-M. Wang, F. T. Chen, K.-L. Su, C.-H. Lien, K.-H. Cheng,
H.-T. Wu, T.-K. Ku, M.-J. Kao, and M.-J. Tsai, “4 Mb embedded SLC
resistive-RAM macro with 7.2 ns read-write random-access time and
160 ns MLC-access capability,” in Proc. IEEE ISSCC Tech. Dig., 2011,
pp. 200–202.
[12] Y. S. Chen, H. Y. Lee, P. S. Chen, P. Y. Gu, C. W. Chen, W. P. Lin,
W. H. Liu, Y. Y. Hsu, S. S. Sheu, P. C. Chiang, W. S. Chen, F. T. Chen,
C. H. Lien, and M.-J. Tsai, “Highly scalable hafnium oxide memory
with improvements of resistive distribution and read disturb immunity,”
in IEDM Tech. Dig., 2009, pp. 105–108.
[13] S. C. Chae, J. S. Lee, S. Kim, S. B. Lee, S. H. Chang, C. Liu, B. Kahng,
H. Shin, D.-W. Kim, C. U. Jung, S. Seo, M.-J. Lee, and T. W. Noh, “Ran-
dom circuit breaker network model for unipolar resistance switching,”
Adv. Mater., vol. 20, no. 6, pp. 1154–1159, Mar. 2008.
[14] X. Guan, S. Yu, and H.-S. P. Wong, “On the switching parameter variation
of metal oxide RRAM—Part II: model corroboration and device design
strategy,” IEEE Trans. Electron Devices, vol. 59, no. 4, pp. 1183–1188,
Apr. 2012.
[15] S. Yu, Y. Wu, and H.-S. P. Wong, “Investigating the switching dynamics
and multilevel capability of bipolar metal oxide resistive switching mem-
ory,” Appl. Phys. Lett., vol. 98, no. 10, p. 103514, Mar. 2011.
[16] S. Yu, Y. Wu, R. Jeyasingh, D. Kuzum, and H.-S. P. Wong, “An electronic
synapse device based on metal oxide resistive switching memory for
neuromorphic computation,” IEEE Trans. Electron Devices, vol. 58, no. 8,
pp. 2729–2737, Aug. 2011.
[17] N. Xu, B. Gao, L. F. Liu, B. Sun, X. Y. Liu, R. Q. Han, J. F. Kang, and
B. Yu, “A unified physical model of switching behavior in oxide-based
RRAM,” in VLSI Symp. Tech. Dig., 2008, pp. 100–101.
[18] M.-J. Lee, S. Han, S. H. Jeon, B. H. Park, B. S. Kang, S.-E. Ahn,
K. H. Kim, C. B. Lee, C. J. Kim, I.-K. Yoo, D. H. Seo, X.-S. Li, J.-B. Park,
J.-H. Lee, and Y. Park, “Electrical manipulation of nanofilaments in
transition-metal oxides for resistance-based memory,” Nano Lett., vol. 9,
no. 4, pp. 1476–1481, Apr. 2009.
[19] D.-H. Kwon, K. M. Kim, J. H. Jang, J. M. Jeon, M. H. Lee,
G. H. Kim, X.-S. Li, G.-S. Park, B. Lee, S. Han, M. Kim, and
C. S. Hwang, “Atomic structure of conducting nanofilaments in TiO2
resistive switching memory,” Nat. Nanotechnol., vol. 5, no. 2, pp. 148–
153, Feb. 2010.
[20] U. Russo, D. Ielmini, C. Cagli, and A. L. Lacaita, “Self-accelerated
thermal dissolution model for reset programming in unipolar resistive
switching memory (RRAM) devices,” IEEE Trans. Electron Devices,
vol. 56, no. 2, pp. 193–200, Feb. 2009.
[21] S. Yu and H.-S. P. Wong, “A phenomenological model for the reset
mechanism of metal oxide RRAM,” IEEE Electron Device Lett., vol. 31,
no. 12, pp. 1455–1457, Dec. 2010.
[22] S. Blonkowski, “Filamentary model of dielectric breakdown,” J. Appl.
Phys., vol. 107, no. 8, p. 084109, Apr. 2010.
[23] S. Yu, X. Guan, and H.-S. P. Wong, “Conduction mechanism of
TiN/HfOx/Pt resistive switching memory: A trap-assisted-tunneling
model,” Appl. Phys. Lett., vol. 99, no. 6, p. 063507, Aug. 2011.
[24] G. Bersuker, D. C. Gilmer, D. Veksler, J. Yum, H. Park, S. Lian,
L. Vandelli, A. Padovani, L. Larcher, K. McKenna, A. Shluger, V. Iglesias,
M. Porti, M. Nafría, W. Taylor, P. D. Kirsch, and R. Jammy, “Metal oxide
RRAM switching mechanism based on conductive filament microscopic
properties,” in IEDM Tech. Dig., 2010, pp. 456–459.
[25] S.-G. Park, B. Magyari-Köpe, and Y. Nishi, “Impact of oxygen vacancy
ordering on the formation of a conductive filament in TiO2 for resistive
switching memory,” IEEE Electron Device Lett., vol. 32, no. 2, pp. 197–
199, Feb. 2011.
[26] B. Gao, B. Sun, H. Zhang, L. F. Liu, X. Y. Liu, R. Q. Han, J. F. Kang, and
B. Yu, “Unified physical model of bipolar oxide-based resistive switching
memory,” IEEE Electron Device Lett., vol. 30, no. 12, pp. 1326–1328,
Dec. 2009.
[27] K. Xiong and J. Robertson, “Point defects in HfO2 high K
gate oxide,” Microelectron. Eng., vol. 80, no. 1, pp. 408–411,
Jun. 2005.
[28] K. Tse and J. Robertson, “Defects and their passivation in high
K gate oxides,” Microelectron. Eng., vol. 84, no. 4, pp. 663–668,
Apr. 2007.
[29] N. F. Mott and E. A. Davis, Electronic Processes in Non-Crystalline
Materials. Oxford, U.K.: Clarendon, 1979.
[30] G. Jegert, A. Kersch, W. Weinreich, U. Schröder, and P. Lugli, “Modeling
of leakage currents in high-k dielectrics: Three-dimensional approach
via kinetic Monte Carlo,” Appl. Phys. Lett., vol. 96, no. 6, p. 062113,
Feb. 2010.
[31] D. Ielmini and Y. Zhang, “Analytical model for subthreshold conduction
and threshold switching in chalcogenide-based memory devices,” J. Appl.
Phys., vol. 102, no. 5, p. 054517, Sep. 2007.
[32] W. J. Zhu, T.-P. Ma, T. Tamagawa, J. Kim, and Y. Di, “Current transport
in metal/hafnium oxide/silicon structure,” IEEE Electron Device Lett.,
vol. 23, no. 2, pp. 97–99, Feb. 2002.
[33] L. Larcher, “Statistical simulation of leakage currents in MOS and
flash memory devices with a new multiphonon trap-assisted tunneling
model,” IEEE Trans. Electron Devices, vol. 50, no. 5, pp. 1246–1253,
May 2003.
[34] N. F. Mott and R. W. Gurney, Electronic Processes in Ionic Crystals.
Oxford, U.K.: Dover, 1948.
[35] B. Gao, J. F. Kang, H. W. Zhang, B. Sun, B. Chen, L. F. Liu, X. Y. Liu,
R. Q. Han, Y. Y. Wang, B. Yu, Z. Fang, H. Y. Yu, and D.-L. Kwong,
“Oxide-based RRAM: physical based retention projection,” in Proc. ESS-
DERC, 2010, pp. 392–395.
[36] P. Gonon, M. Mougenot, C. Vallee, C. Jorel, V. Jousseaume, H. Grampeix,
and F. El Kamel, “Resistance switching in HfO2 metal-insulator-metal
devices,” J. Appl. Phys., vol. 107, no. 7, p. 074507, Apr. 2010.
[37] J. Mcpherson, J.-Y. Kim, A. Shanware, and H. Mogul, “Thermochemical
description of dielectric breakdown in high dielectric constant materials,”
Appl. Phys. Lett., vol. 82, no. 13, pp. 2121–2123, Mar. 2003.
[38] L. Vandelli, A. Padovani, G. Bersuker, D. Gilmer, P. Pavan, and
L. Larcher, “Modeling of the forming operation in HfO2-based resis-
tive switching memories,” in Proc. IEEE Int. Memory Workshop, 2011,
pp. 119–122.
[39] E. W. Dijkstra, “A note on two problems in connexion with graphs,”
Numerische Mathematik, vol. 1, no. 1, pp. 269–271, Dec. 1959.
[40] Y.-S. Chen, W.-H. Liu, H.-Y. Lee, P.-S. Chen, S.-M. Wang, C.-H. Tsai,
Y.-Y. Hsu, P.-Y. Gu, W-S. Chen, F. Chen, C.-H. Lien, and M.-J. Tsai,
“Impact of compliance current overshoot on high resistance state, memory
performance, and device yield of HfOx based resistive memory and its
solution,” in VLSI Symp. Tech. Dig., 2011, pp. 108–109.
Ximeng Guan (S’06–M’11) received the Ph.D. and
B.E. degrees (with honors) from Tsinghua Univer-
sity, Beijing, China, in 2010 and 2005, respectively.
He is currently a Postdoctoral Scholar with the
Stanford Nanoelectronics Group, Center for Inte-
grated Systems and the Department of Electrical
Engineering, Stanford University, Stanford, CA. He
is currently working on the modeling of resistive
nonvolatile memory, energy-efficient electronic de-
vices, and metal–oxide–semiconductor field-effect
transistors (FETs) with high-mobility channels. He
has authored or coauthored 24 journal and conference proceeding papers,
covering the topics of quantum transport, band structure, strain, III-V device
channels, carbon-based resistive memory, tunneling FETs, and nanoscale con-
tact interfaces. His research interests are modeling of nanoscale electronic
devices.
Dr. Guan was the recipient of the IEEE Electron Devices Society Ph.D.
Student Fellowship in 2009.
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1182 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 59, NO. 4, APRIL 2012
Shimeng Yu (S’10) received the B.S. degree from
Peking University, Beijing, China, in 2009 and the
M.S. degree, in 2011, from Stanford University,
Stanford, CA, where he is currently working toward
the Ph.D. degree with the Center for Integrated Sys-
tems and the Department of Electrical Engineering.
His past research activities include the simulation
of parameter fluctuation in nanoscale transistors and
static random-access memory (SRAM) cells. He has
been working on the fabrication, characterization,
and modeling of emerging resistive switching mem-
ory devices and their applications for neuromorphic computation system since
2008. He first-authored one book chapter of Functional Metal Oxide Nanos-
tructures and papers appearing in Applied Physics Letters and Nanotechnology.
Mr. Yu has first-authored tens of papers appearing in the IEEE International
Electron Devices Meeting, IEEE TRANSACTIONS ON ELECTRON DEVICES,
and IEEE ELECTRON DEVICE LETTERS. He also serves as an active reviewer
for these journals. In 2011, he had a summer internship in IMEC, Belgium. He
was the recipient of the Stanford Graduate Fellowship 2009–2012 and the IEEE
Electron Devices Society Masters Student Fellowship 2010.
H.-S. Philip Wong (S’81–M’82–SM’95–F’01) re-
ceived the B.Sc. (Hons.) degree from the University
of Hong Kong, Pokfulam, Hong Kong, in 1982, the
M.S. degree from the State University of New York
at Stony Brook, in 1983, and the Ph.D. degree from
Lehigh University, Bethlehem, PA, in 1988, all in
electrical engineering.
He is currently with the Center for Inte-
grated Systems and the Department of Elec-
trical Engineering, Stanford University, Stanford,
CA. He joined the IBM T. J. Watson Re-
search Center, Yorktown Heights, NY, in 1988. In September 2004, he
was with Stanford University, as a Professor of electrical engineering.
While at IBM, he worked on charge-coupled device and complemen-
tary metal–oxide–semiconductor (MOS) image sensors, double-gate/multigate
MOS field-effect transistors (MOSFETs), device simulations for advanced/
novel MOSFETs, strained silicon, wafer bonding, ultrathin body silicon-
on-insulator, extremely short gate field-effect transistors (FETs), germanium
MOSFETs, carbon nanotube FETs, and phase change memory. He held various
positions from Research Staff Member to Manager, and Senior Manager. While
he was Senior Manager, he had the responsibility of shaping and executing
IBM’s strategy on nanoscale science and technology, as well as exploratory sili-
con devices and semiconductor technology. His research interests are nanoscale
science and technology, semiconductor technology, solid-state devices, and
electronic imaging. He is interested in exploring new materials, novel fabrica-
tion techniques, and novel device concepts for future nanoelectronics systems.
Novel devices often enable new concepts in circuit and system designs. His
research also includes explorations into circuits and systems that are device
driven. His current research interests include a broad range of topics includ-
ing carbon nanotubes, semiconductor nanowires, self-assembly, exploratory
logic devices, nanoelectromechanical devices, novel memory devices, and
biosensors.
Dr. Wong served on the IEEE ELECTRON DEVICES SOCIETY as elected
AdCom member from 2001 to 2006. He served on the IEEE International
Electron Devices Meeting committee from 1998 to 2007 and was the Technical
Program Chair in 2006 and the General Chair in 2007. He served on the
International Solid-State Circuits Conference program committee from 1998
to 2004 and was the Chair of the Image Sensors, Displays, and MEMS
subcommittee from 2003 to 2004. He serves on the Executive Committee of
the Symposia of VLSI Technology and Circuits. He was the Editor-in-Chief
for the IEEE TRANSACTIONS ON NANOTECHNOLOGY during 2005–2006. He
has been a Distinguished Lecturer of the IEEE Electron Devices Society since
1999 and Solid-State Circuit Society during 2005–2007.
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